FIR and folded IIR filter designs for speech processing in hearing AID

Sai Lakshmi Chaitanya, B.; Rajalakshmi, K.

doi:10.22075/ijnaa.2021.5849

FIR and folded IIR filter designs for speech processing in hearing AID

Document Type : Research Paper

Authors

B. Sai Lakshmi Chaitanya

K. Rajalakshmi

ME VLSI, ECE, PSG College of Technology (of Affiliation) Anna University, Coimbatore, India

10.22075/ijnaa.2021.5849

Abstract

The present trend of low power and area has led to the design of many efficient algorithms for speech processing in portable devices. In biomedical applications like hearing aid, high performance is not the key area of interest. Area and power also play a major role. There are many factors that affect market penetration. So, the system can run as slow as possible to trade speed for power and area. An area-efficient folded IIR filter is designed. The folded architecture uses the concept of time multiplexing and it has only one multiplier and one adder to perform all the operations. Thus, the area is reduced, and this filter is converted into an IP. The area and resource utilization of the folded IIR filter is compared with the normal IIR filter design. AFIR filter is also designed and converted into an IP. This FIR IP is used in the block design to process a corrupted audio signal. Zed board is a part of Xilinx zynq -7000 All Programmable SoC. It consists of a processing system and programming logic. The filter design is implemented in the programming logic part. The design is synthesized and the bitstream is generated. The generated bitstream along with the hardware is exported to SDK where the corrupted audio signal is processed on zed board.

Keywords

Low power

multiplexing

SoC

Processing system

Programming logic

[1] S. J. S. Bradley, Using ISO 3382 measures, and their extensions, to evaluate acoustical conditions in concert
halls, Acoustical Science and Technology, ISSN: 1346-3969, (2005) 170-178.
[2] C. Y. R. Chen, and M. Z. Moricz, A delay distribution methodology for the optimal systolic synthesis of linear
recurrence algorithms, IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., 10 (6) (1991)685–697 .
[3] A. Hemdani, M. W. Naouar, I. S. Belkhodja, and E. Monmasson, Design of a digital IIR filter for active filtering
applications, in Proc. IEEE Int. Mediterranean Electrotech. Conf., 2012 1107–1112.
[4] A, Heubi, Sara Grasst, A Low Power VLSI Architecture with an Application to Adaptive Algorithms for Digital
Hearing Aids, Published in 7th European Signal Processing Conference EUSIPCO 7 (1994) 1875-1878.
[5] R. Litovsky, S. Colburn, W. Yost, and S. Guzman, The precedence effect, The Journal of the Acoustical Society
of America, 106 (1999) 1633–1654.
[6] M. Miyoshi, and Y. Kaneda, Inverse filtering of room acoustics, IEEE Trans, Speech Audio Process. 36 (1988)
145–152.
[7] M. Mohamed Asan Basiri, and Sk. Noor Mahammad, Congiurable Folded IIR Filter Design, IEEE TRANSACTIONSON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, 62 (12) (2015).
[8] K, K. Parhi, VLSI Digital Signal Processing Systems -Design and Implementation, A Wiley-Interscience Publication JOHN WILEY and SONS INC.
[9] C. S. Wallace, A suggestion for a fast multiplier, IEEE Trans. Electron. Comput., EC-13 (1) (1964) 14–17,